Computers / Programming / Language References / Assembly / MOS 6502 / MOS 6502 Architecture

Overview

The 6502 has an 8-bit data bus and a 16-bit address bus allowing it to access 64 KiB of memory.

CPU Registers

15
8
7
0
    A
    X
    Y
SP 0x01 S
PC PCH PCL
    P

The 6502 has three 8-bit data registers, the accumulator (A) and two index registers (X, Y).

It also has a 16-bit program counter (PC) register and a stack pointer (SP). Only the lower 8-bits of the stack pointer can be modified as the S register, the upper 8-bits are always 0x01. This means that the stack takes up the second page of memory just after the zero page which is used to store variables for running applications.

The 6502 also has a Processor status (P) register that holds the status flags.

Condition Flags

The 6502 has 7 flags that are set by various instructions.

Carry/Borrow

Updated to indicate if a carry/borrow occurs as the result of an arithmetic instruction or as an additional bit of data used by other instructions.

Zero

Set if the result of an operation is zero.

Interrupt Disable

Set by default and must be cleared if interrupts are desired

Decimal Mode

Set to indicate that add and subtract operations should treat values as binary-coded-decimal (BCD) instead of binary.

Break Command

Set if an interrupt was triggered by the BRK command.

Overflow

Indicates that an overflow occurred during an add or subtract operation

Negative

Set based on the most-significant bit of the value in the accumulator to indicate the sign of the result.

Stack Operations

The stack location is set by loading a value into S and it expands downwards in memory. Because the upper 8-bits of the stack pointer are fixed the stack is limited to 256 bytes and is always in a fixed location in memory.

Input Output

Input and Output are performed using memory mapped devices. The electronics of the devices are setup to respond to specific addresses and that allows for data to be written to and read from the device